In a wiring process of a semiconductor device, an interlayer insulating film formed between wiring layers is etched so that the wiring layers can be electrically connected with each other. In such a case, formed beneath the interlayer insulating film is an SiC or an SiN film serving as a barrier layer. When the SiC or the SiN film is etched to form a wiring pattern following an etching of the interlayer insulating film, the interlayer insulating film is used as a mask.
Meanwhile, since further improvement in speed is required in the semiconductor device, a material having a low dielectric constant is used for the interlayer insulating film, in which case an organic Si-based material has been known as the material having the low dielectric constant.
As a method for etching the SiC film, there are disclosed a technique of using CF4 and O2 in Japanese Patent Laid-open Publication No. 1982-124438; a technique of using CF4, CHF3 and O2 in Japanese Patent Laid-open Publication No. 1987-216335; and a technique of using CHF3 and Ar in Japanese Patent Laid-open Publication No. 1992-293234. However, none of the techniques yield a satisfactory result due to providing a low etching rate of approximately 10 nm/min. In addition to the low etching rate when etching the SiC film by using an organic Si-based low dielectric constant film formed thereon as a mask, the techniques fail to provide a sufficiently satisfactory etching selectivity with respect to the organic Si-based low dielectric constant film.
Similarly in etching an SiN film, an etching technique capable of maintaining a sufficiently satisfactory etching rate with high etching selectivity with respect to the organic Si-based low dielectric constant film has not been found.